Verilog / VHDL Jobs

Verilog is a description language used in the field of semiconductor and electronic design. It is also used in analog and mixed-signal circuits. VHDL is a hardware description language used in electronic design automation and integrated circuits. If your business is working with Verilog / VHDL then you can use some freelancer help to ease the workload. Post your Verilog/VHDL job today to connect with such freelancers. Verilog / VHDL Designers 분야 채용

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    23 건의 일자리 확인, 급여 기준: USD

    Project 1 is a non-pipelined MIPS. Project 2 is a pipelined MIPS without the considerations for branch hazard and data forwarding. Project 3 is a pipelined MIPS including branch hazard and data forwarding.

    $153 (Avg Bid)
    $153 (평균 입찰가)
    3 건의 입찰

    Implement an SRAM circuit that has a 32 bytes with its associated decoder and multiplexer. The SRAM memory must have the following properties: 1- Addresses are from 0x8000 to 0x801F. 2- You can read and write one byte at a time. 3- The are special output signals that are required. They are listed in the table below.

    $191 (Avg Bid)
    $191 (평균 입찰가)
    9 건의 입찰

    The project is to implement a GPS / Galileo signal tracking algorithm into the FPGA side of a Zynq 7020. A first algorithm has been already developed and validiated on Matlab. The scope of this job is Task-1.1 FPGA Design to convert the GNSS tracking algorithms given in C++ by 3D Aerospace for to the FPGA (in VHDL) side of a Zynq-7020 using Vivado 2019.1 (baremetal) Task-1.2 Validation of the V...

    $21 / hr (Avg Bid)
    $21 / hr (평균 입찰가)
    4 건의 입찰

    Need engineer with experience in MATLAB and VERILOG and can handle the project. More details will be shared over a chat

    $149 (Avg Bid)
    $149 (평균 입찰가)
    9 건의 입찰

    The broad area regarding the project is related to fingerprint identification and classification using CNN algorithm which is to be implemented using simulink on FPGA board

    $353 (Avg Bid)
    $353 (평균 입찰가)
    4 건의 입찰

    Project need ethminer kernel(source and binary file) for xilinx u200. I want to program using vhdl/Verilog.

    $2600 (Avg Bid)
    $2600 (평균 입찰가)
    1 건의 입찰

    I have done a Verilog module for clock and data recovery using DLL ( this is for simulation purposes only) I used Modelsim for simulation. In the transmitter (Tx), I only have a clock that has a random phase shift and random data both going to an XOR gate. The output is just data out. I also used Manchester coding scheme as a data format. The receiver (Rx) doesn't have a clock, it has to extr...

    $191 (Avg Bid)
    $191 (평균 입찰가)
    7 건의 입찰
    ethereum bit stream 5 일 left
    확인

    i have fpga vcu/bcu1525 card, vivado lab & miner..so i need just ether bit stream and [로그인하시면, URL을 확인하실 수 있습니다.] any one understand my project and contact me.

    $1500 - $3000
    $1500 - $3000
    0 건의 입찰

    The project is to implement a GPS / Galileo signal tracking algorithm into the FPGA side of a Zynq 7020. A first algorithm has been already developed and validiated on Matlab. The scope of this job is Task-1.1 FPGA Design to convert the GNSS tracking algorithms given in C++ by 3D Aerospace for to the FPGA (in VHDL) side of a Zynq-7020 using Vivado 2019.1 (baremetal) Task-1.2 Validation of the V...

    $21 / hr (Avg Bid)
    $21 / hr (평균 입찰가)
    4 건의 입찰
    FPGA Mining 5 일 left

    FPGA Mining fot Xilinx® Alveo™ U30

    $126 (Avg Bid)
    $126 (평균 입찰가)
    2 건의 입찰
    assembler simple project 4 일 left
    확인

    assembler simple project contact for more details

    $121 (Avg Bid)
    $121 (평균 입찰가)
    11 건의 입찰

    it is analog based project required a good knowledge in the cadence or in analog tool that is good

    $54 (Avg Bid)
    $54 (평균 입찰가)
    5 건의 입찰
    device expert 4 일 left
    확인

    I am going to add required with Xilinx and Vivado in A BASYS 3 BOARD

    $12 / hr (Avg Bid)
    $12 / hr (평균 입찰가)
    2 건의 입찰

    Hi, I have a project for data modulation and encoding, I did part of it in digital and I need help in analysis and measruments

    $141 (Avg Bid)
    $141 (평균 입찰가)
    7 건의 입찰

    Hi, I have a project for inductive coupling coils I have all parameters and I would like to inject some crosstalk (jitter in the time domain) in the transmitter clock only and see the consequences in the Rx side and calculate BER and so on ,..

    $256 (Avg Bid)
    $256 (평균 입찰가)
    7 건의 입찰

    the assignment is to create a register file design using vhdl language. one has to write usig the attached template.

    $16 (Avg Bid)
    $16 (평균 입찰가)
    5 건의 입찰
    snake leader game 12 시간 left

    use verilog language to make snake and leader game

    $28 (Avg Bid)
    $28 (평균 입찰가)
    7 건의 입찰
    Eaton PLC Project 11 시간 left
    확인

    Our customer has a machine controlled by Eaton PLC. Vendor has abandoned the system but the PLC software is installed. Need a PLC programmer experienced with Eaton to work with our programmers to examine and document the code currently installed and then assist our programmers to integrate the PLC system into our application. The system is overseas so work would be done using remote connection

    $879 (Avg Bid)
    $879 (평균 입찰가)
    24 건의 입찰

    Hi I need help for my project on FPGA board for implementation of design using Vhdl. Please contact asap.

    $25 (Avg Bid)
    $25 (평균 입찰가)
    14 건의 입찰
    PCIe on Xilinx FPGA 종료 left
    확인

    Need to develop a system that uses PL based logic to implement PCIe bus for communication with PC

    $506 (Avg Bid)
    $506 (평균 입찰가)
    4 건의 입찰

    i have a 3 axis machine controlled by stepper motors the stepper motors are controlled by a STM32. i am using the NUCLEO-F746ZG as the board. the embedded controller needs to communicate with a PC application using a USB.

    $26 / hr (Avg Bid)
    $26 / hr (평균 입찰가)
    35 건의 입찰

    I just need help with this Verilog assignment asap

    $32 (Avg Bid)
    $32 (평균 입찰가)
    28 건의 입찰
    I need a coder 종료 left

    I am doing a coding project to get into a program to become a coder using bluej and need help!

    $130 (Avg Bid)
    $130 (평균 입찰가)
    19 건의 입찰