i need a task of SystemVerilog and UVM test environment for RISC-V processor -- 2

Hi, I'm experienced Verification Engineer. I have more than 6 years working with SystemVerilog + UVM. I can make a good environment for your processor. Kind Regards, Nikita.

Although I'm not a expert, but if you hire me, I can. I was a engineer 6 years ago, so I can do it.

have a good day...! hello sir I can help your project please contact me discuss about thank you....!

Having industry experience in SV & UVM based environment components development and verification. It's my first project as a freelancer.