Verilog. 2D convolution module FPGA

I have worked with MATLAB HDL coder and done many projects in which i generated HDL code, i will generate synthesizable verilog code as per your requirment. Thanks!

I am a Digital Hardware/Software/FPGA Engineer with over 3.5 years of experience. I have extensive experience in • Complex digital FPGA design and verification • VHDL for simulation and synthesis • Schematic and PCB Design using Cad-Star. • Assembly/C/MATLAB/VHDL/ Embedded C programming • Hands on experience of different tools Like Xilinx(ISE,Vivado), MatlabSimulink , cad star, etc. • Lab integration and debugging using oscilloscopes, chip scope logic analyzers and other lab equipment. • Hands of working on MIL-1553 bus interfacing. • Hands of experience on RF design and simulation.

Hello, I have had 7 years of experience working with FPGAs and even more with Verilog and VHDL. Please take a look at my profile and if you feel I can match your requirements, I will try to deliver in shortest time and with minimal iterations as well as optimum efficiency. Looking forward to hear from you. Regards, Shrikul