VHDL XILINX Lab

Objective: Design a coprocessor that finds square of an integer (x2), finds square-root of an integer (x0.5), converts an uppercase word to lowercase word, performs floating-point addition, and performs floating-point multiplication. Implement the design on a SoC (System on a Chip) using XPS and SDK tools of Xilinx. Requirements: (80 Points) 1. Using VHDL behavioral modeling, design a coprocessor that can do five operations (square, square-root, uppercase to lowercase conversion, floating-point addition, and floating-point multiplication). 2. Implement the coprocessor design using a system (processor, memory, user logic, and slave registers) that is built using Xilinx Platform Studio (XPS) 3. Using the Xilinx SDK, write a software routine to test (at least two test cases per operation) the coprocessor that is designed using an FPGA SoC and implemented on Nexys 4 board.