Assist with Implementation of VHDL design in an FPGA
$25-50 CAD / hour
종료됨
게시됨 4년 이상 전
$25-50 CAD / hour
SITUATION:
I have a VHDL design for a custom processor + peripherals that needs to go into an FPGA. It passes functional simulation that uses VHDL testbenches. I am in the process of adding VHDL checkers.
This design needs to pass timing simulation with a (soft) target frequency of 50 MHz, be programmed into an FPGA, and be verified using an off-the-shelf FPGA card.
While I'm strong in digital design, VHDL coding and VHDL testbenches, I'm having trouble with vendor toolchains and documentation - I've spent a great deal of time with them, but have been blocked on key elements of the design flow, specifically constraints and timing simulations.
A simple NDA will be needed before I can release the actual design files.
DELIVERABLES NEEDED:
recommended changes to the:
-VHDL source code for the PLL and IOBs (pad ring functions)
-project setup in the vendor's toolchain
constraints file
timing simulation run
FPGA bitfile
[Removed by Freelancer.com Admin for offsiting - please see Section 13 of our Terms and Conditions] to explain:
-your process, starting with source code and ending in a working FPGA
-the above items and how they were created
-how to specify pad ring functions, e.g. registered output pads (i.e. IOBs)
-other things I'm having trouble understanding from the vendor documentation
Dear customer,
I am really happy to help you out of this project. I would like to introduce that I am an freelancer with 100% JOB COMPLETED in VHDL/VERILOG and about 200 JOB completed.
I am really suitable for job description:
First: I am an Electronics engineer who is very expertise with VHDL/Verilog. In fact, I have done with very high difficult project in backend design in FPGA by correct timinig closure for FPGA with 400 Mhz in Virtex Ultrascale+ in some field like mining coin (bitcore, and lyra2rev3)
Also, I am very good in English (IELTS 6.0) and I have several year of researching so I can fully understand your requirement and understand fully about the papers and write the academic report. Please contact me and let me know if you want any special requirement and do with lower price.
Thank you.
Hi there! My name is Fernando and I'm very interested in your proyect and would be happy to assist you on it.
I'm a Senior Electronic Engineer with 6+ years of experience in the Aerospace and IoT industries.
Also, I belong to the Preferred Freelancer team, which is the elite top 1% of Freelancer.com.
In my experience in the aerospace, I worked in high-speed designs on FPGAs.
I have experience in the following:
- Development with VHDL / Verilog using Xilinx FPGAs with ISE and VIVADO.
- Best practices in RTL development and Xilinx UltraFast Design Methodology
- Performance, time and area optimization.
- FPGA timing constraints, timing analysis, clock domain crossing
- Behavioral and PP&R (Post Place and Route) Simulation Testing
- Testing on hardware remotely and in laboratories.
- C programming language in embedded systems and C++
What FPGA are you using?
What issues do you have in the timing simulation and constraints?
I would like to know more details about your project.
You can trust that I will give my best to deliver a work that exceeds your expectations.
Thanks for your consideration.
Best regards
Hi
I have been working on Verilog-VHDL and Xilinx and Altera FPGAs by more than 6 years.
I have required knowledge and experience, let us discuss and start the work
Thanks
Hello
I have developed several kinds of projects like Face detection, Pose detection, Video analytics, ADAS detection using Yolo-v3. I think this project is very suitable for me and I have done many other FPGA programming project like:
- Virtex-7 based 16 layers FPGA miner PCB design and Firmware Programming.
- Xillinx ZCU1024 based Face detection system
- Artix-7 based CMOD-7 USB-JTAG Bridge FPGA board and program
Please contact me to discuss the project in more detail via chat or call.
Thank you
Hi,
I am Navoda, representing Agnar Consulting. I have more than 3 years of experience with FPGAs, including Verilog and VHDL. Are you allowed to disclose the vendor you are using (Xilinx/Altera)? Either way, if you send me the NDA, I can sign it and have a look at the details.
Thank you
Regards,
Navoda
Hello
I have over 10 years experience designing with FPGAs from Intel and Xilinx. There would be no problem in creating a project for you with constraints. Do you have a target board in mind? I do have a few FPGA boards that I could use to test. Let me know if you would like to discuss. Happy to sign your NDA.
Regards
Jon
Hello,
I have vast experience implementing complex system with demanding timing requirements on FPGA in VHDL.
With my consultation / coding and close support you'll reach a favorable result in a short time.
I speak good English and I'm very easy to work with.
I'd love to discuss your needs.
Please contact me so we can move forward with this.
Thanks and good luck.
Greetings to you my dear!. I read your whole proposal, and thanks for your post on my good experience.
This is very good job for me.
So I think I can do this in high quality.
My relevant skills are VHDL, FPGA, Altium Designer
I want to further discuss with you.
I look forward to working together in partnership on your project and into the future.
Best Regards.
I wanted to have more experiences for fpga. I have experience with cyclone IV implementation also simulations. Im expert for digital signal processing and digital signal processing also i can combined with arduino, pic and Arm microcontroller. Also i know proteus and mathlab platforms.